One bit differential detector with frequency offset compensation

ABSTRACT

A one-bit differential detector for a GMSK signal operates independently of an offset frequency. In particular, a decision signal used by a decision circuit to distinguish between logic &#34;0&#34; and logic &#34;1&#34; is always equal to sin[Δφ(T)]. The inventive detector has an improved bit error rate performance in comparison to the prior art.

FIELD OF THE INVENTION

The present invention relates to a detector for use in a communicationsystem using a phase-shift-keying (PSK) modulation scheme.

More particularly, the present invention relates to a one-bitdifferential detector for a Gaussian baseband filtered minimum shiftkeying (GMSK) signal which eliminates problems relating to frequencyoffset.

BACKGROUND OF THE INVENTION

FIG. 1 illustrates a GMSK transmitter. Such a transmitter may be usedfor mobile communications in Europe in accordance with Digital EuropeanCordless Telecommunications (DECT) standard.

The GMSK transmitter 10 of FIG. 1 comprises a Gaussian Low Pass Filter(LPF) 12 and an FM modulator 14.

The transfer function of the Gaussian LPF is ##EQU1##

B_(t) denotes the Gaussian Lowpass Filter (LPF) bandwidth which isillustratively 3 dB.

B is the cutoff frequency of the Gaussian filter and T is the datasymbol time. Illustratively, BT=0.5

B_(tn) is the equivalent noise bandwidth.

K is the transformation coefficient which relates B_(t) to B_(m) and isoften considered to be one.

The Gaussian LPF filter 12 receives a Non-Return-to-Zero (NRZ) signal atits input. The output of the filter 12 is a baseband signal of frequencyf_(b) equal to 1.152 MHz. The baseband signal is inputted to themodulator 14. The FM modulator 14 is a minimum shift keying (GMSK)modulator. The output signal of the modulator 14 is a GMSK signal. TheGMSK signal is in the intermediate band and has a frequency f_(IF)=4f_(b).

A prior art detector 20 for a GMSK signal is illustrated in FIG. 2. TheGMSK signal enters the intermediate band filter 22 with transferfunction H_(r) (t). The output signal of the filter 22 is

    x(t)=cos[ω.sub.IF t+φ(t)]

In the signal x(t), ω_(IP) =2πf_(IF). The phase is φ(t). The filter 22serves to band limit the signal x(t) and normalizes the envelope of x(t)to unity for all t. The phase φ(t) contains the information.

The detector 20 comprises the one unit delay 24, the 90° phase shifter26, and the multiplier 28. The multiplier 28 receives the signal x(t)directly, via path 29, and via path 30, which includes the delay 24 andphase shifter 26. The output of the multiplier 28 is connected to thezonal LPF 32. The output of the zonal LPF 32 is

    y(t)=sin[Δφ(T)]

where Δφ(T)=φ(t)-φ(t-T). Thus Δφ(T) represents the change in phase ofthe signal x(t) over a one symbol time interval. The function sin[Δφ(T)]represents the sine of the change of phase of the signal x(t) over a onesymbol time interval.

The output of the zonal LPF 32 goes to a decision circuit 34. Thedecision circuit outputs logic 1's and 0's according to the decisionrule

    ______________________________________                                        sin[Δφ(T)] > 0                                                                           output logic 1                                           sin[Δφ(T)] < 0                                                                           output logic 0                                           ______________________________________                                    

A transmitter and a detector for GMSK signals such as the transmitter 10of FIG. 1 and the detector 20 of FIG. 2 is disclosed in Marvin K. Simonet al., "Differential Detection of Gaussian MSK in a Mobile RadioEnvironment" IEEE Transactions on Vehicular Technology, Vol. VT-33 No.November 1984, page 307.

One problem with the detector 20 of FIG. 2 is that an offset frequencywill degrade the bit error rate performance. However, in the DECTstandard an offset of ±50 kHz is acceptable.

If ω_(IF) =8πf_(b) +Δω=8πf_(b) +2πΔf, where Δf is the frequency offset,then the output of the zonal filter 32 is

    y(t)=sin[2πΔf/f.sub.b +Δφ(T)].

The signal y(t) is now the sine of the change in phase of the signalx(t) over a one symbol time interval plus a frequency offset term.

Thus, the signal used by the decision circuit 34 to decide between logic"1" and logic "0" is distorted due to the frequency offset. Thisdistortion will degrade the bit error rate performance of the detector.

In view of the foregoing, it is an object of the present invention toprovide a one bit differential detector for a GMSK signal whicheliminates the distortion caused by frequency offset. More particularly,it is an object of the present invention to modify the detector circuit20 of FIG. 2 to eliminate the dependence on the offset frequency of theoutput of the zonal filter 32.

SUMMARY OF THE INVENTION

In accordance with the present invention, a one bit differentialdetector for a GMSK signal which is independent of any offset frequencyis provided. In particular, a decision signal used by a decision circuitto decide between logic "0" and logic "1" is always proportional tosin[Δφ(T)] independently of the presence of any offset frequency. Theinventive detector has an improved bit error rate performance incomparison to the prior art.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 schematically illustrates a prior art GMSK transmitter.

FIG. 2 schematically illustrates a prior art GMSK detector.

FIG. 3 schematically illustrates an improved GMSK detector according tothe invention.

FIG. 4 illustrates a filter for determining an expectation value for usein the detector of FIG. 3.

FIG. 5 illustrates a 90° phase shifter for use in the detector of FIG.3.

FIG. 6 illustrates an alternate improved GMSK detector according to theinvention.

DETAILED DESCRIPTION OF THE INVNETION

A one bit differential detector for a GMSK signal which is independentof a frequency offset is illustrated in FIG. 3. In the detector 40 ofFIG. 3, a GMSK signal arrives at an Automatic Gain Control (AGC) deviceor hard limiter 42 which outputs the signal x(t). As in the case of theprior art detector 20 of FIG. 2, the signal x(t) is bandwidth limitedand has a normalized envelope for all t.

The detector 40 has two paths. The path I is identical to the processingpath of the prior art detector 20 of FIG. 2 and comprises the unit delay24, the 90° degree phase shifter 26, the multiplier 28 and the low passfilter 32. The multiplier 28 receives the signal x(t) directly and viathe delay 24 and 90° phase shifter 26. The output of the low pass filter32 is the signal

    y.sub.1 =sin[2πΔf/f.sub.b +Δφ(T)]

As indicated above, the signal Y₁ is equal to the sine of the change inphase of the signal x(t) for one symbol time interval plus a frequencyoffset term. Note that the cutoff frequency f_(cut-off) of the filter 32of FIG. 3 is 4f_(b) and the gain is 2.

Path II and the rest of the circuitry has been added to the detector 40of FIG. 3 to eliminate the frequency offset term from the signal y₁.Thus, the overall output signal which is then inputted to the decisioncircuit 34 is

    u(t)=sin[Δφ(T)]

As can be seen, the frequency offset term has been eliminated from thissignal.

The path II includes the unit delay 24, the multiplier 43 and the lowpass filter (LPF) 44. The filter 44 has a cut-off frequency f_(cut-off)=4f_(b) and a gain of 2. The inputs to the multiplier 43 are the signalx(t) and the signal x(t) as delayed by the unit delay 24. The output ofthe multiplier 43 is inputted to the filter 44. The output of the filter44 is

    y.sub.2 (t)=cos[2πΔf/f.sub.b +Δφ(T)]

The signal y₂ is equal to the cosine of the change of phase of thesignal x(t) in one symbol time interval plus a frequency offset term.

Thus, to summarize the discussion thus far, the following signals havebeen considered

    x(t)=cos[ωsaid signal IFt+φ(t)], ω.sub.IF =8πf.sub.b +2πΔf

    y.sub.1 (t)=sin[2πΔf/f.sub.b +Δφ(T)]

    y.sub.2 (t)=cos[2πΔf/f.sub.b +Δφ(T)]

Using the approximation Δf/f_(b) is small, the expression for the signaly₁ becomes

    y.sub.1 (t)=(2πΔf/f.sub.b)cos[Δφ(T)]+sin[Δφ(T)]

The filter 46 is now used to calculate y₁ =E[y₁ (t)], where E is theexpectation value, i.e., longterm average. The expectation value E[y₁(t)] is evaluated as follows:

    y.sub.1 =E[y.sub.1 (t)]=(2πΔf/f.sub.b) E[cos[Δφ(T)]]+E[sin[Δφ(T)]]

For one bit differential detection

    Δφ(T)=Δφ.sub.k =b.sub.k-1 φ.sub.-1 +b.sub.k φ.sub.o +b.sub.k+1 φ.sub.1

The following chart corresponds total possible combinations for BT=0.5.

    ______________________________________                                        Coefficient Combination                                                       b.sub.k-1                                                                             b.sub.k       b.sub.k+1                                                                             Δφ(T)                                 ______________________________________                                         1       1             1      90°                                      -1       1             1      73.7°                                     1       1            -1      68.1°                                    -1       1            -1      51.8°                                     1      -1             1      -51.8                                           -1      -1             1      -68.1°                                    1      -1            -1      -73.7°                                   -1      -1            -1      -90°                                     ______________________________________                                    

Note that the first four entrees of the chart correspond to b_(k) =1 andthe last four entrees correspond to b_(k) =-1.

To evaluate E[cos[Δφ(T)]] and E[sin[Δφ(T)]], it is assumed that allcombinations are equally likely. Thus, because sin[Δφ(T)] is an oddfunction, E[sin[Δφ(T)]=0. The function cos[φ(T)] is an even function sothat

    E[cos[Δφ(T)]=[cos 90°+cos 73.7°+cos 68.1°+cos 51.8°](1/4=0.318.

Thus, the signal at the output of the filter 46 is

    y.sub.1 =(2πΔf/f.sub.b)(0.318).

The multiplier 47 multiplies y₁ by (1/0.318) to obtain the signal

    y.sub.1 =2πΔf/f.sub.b.

The multiplier 48 multiplies y₂ (t) by y₁ to obtain

    z(t)=y.sub.2 (t)y.sub.1 ˜(2πΔf/f.sub.b) cos[Δφ(T)].

Then the subtraction element 49 obtains

    u(t)=y.sub.1 (t)-z(t)=sin[Δφ(T)]

as desired.

The signal u(t) is then inputted into the decision circuit 34 whichdecides between logic "1" and logic "0".

The low pass filter 44 of FIG. 3 for determining E[y₁ (t)] isillustrated in greater detail in FIG. 4.

The filter 46 of FIG. 4 comprises a Butterworth low pass filter 52 and alow pass filter 54. The lowpass filter 54 comprises the weightingelements 55 and 56, the unit delay 57 and the adder 58.

The transfer function of the Butterworth filter is ##EQU2## The transferfunction for the lowpass filter is ##EQU3##

The 90° phase shifter 26 may be implemented as shown in FIG. 5. Thephase shifter 26 comprises two paths 61 and 62. In the path 61 thesignal is advanced one sample, in path 62 the signal is delayed onesample, then the signals are combined using the summer 63.

An alternative one bit differential GMSK detector which eliminates theinfluence of an offset frequency is illustrated in FIG. 6. The detector100 of FIG. 6 does not rely on the assumption that Δf/f_(b) is small.

The detector 100 includes the same path I and path II as the detector 40of FIG. 3. Thus, the filter 32 of path I outputs

    y.sub.1 (t)=sin[2πΔf/f.sub.b +Δφ(T)]

The filter 44 of path II outputs

    y.sub.2 (t)=cos[2πΔf/f.sub.b +Δφ(T)]

It can be shown that

    sin[Δφ(T)]=-sin[2πΔf/f.sub.b ]y.sub.1 (t)+cos[2πΔf/f.sub.b y.sub.2 (t)

The processing circuitry 110 performs this calculation. Morespecifically, to perform the calculation, the circuitry 110 includes thefilter 112 for performing E[y₁ ] where

    E[y.sub.1 ]=sin(2πΔf/f.sub.b)E[cosΔφ(T)]=Csin(2πΔf/f.sub.b)

The filter 114 performs E[y₂ ] where

    E[y.sub.2 ]=cos(2πΔf/f.sub.b)E[cosΔφ(T)]=Ccos(2πΔf/f.sub.b)

where C is a predetermined constant equal to 0.318 for the case BT=0.5.

The multipliers 116 and 118 perform y₁ E[y₂ ] and y₂ [y₁ ],respectively. The results are then subtracted using the subtractionelement 120 and multiplied by (1/C) in the multiplier 122 to obtain thedesired output result.

To summarize, a one bit differential GMSK detector has been disclosed.The inventive detector eliminates the distortions caused by offsetfrequency to improve the bit error rate performance. Finally, theabove-described embodiments of the invention are intended to beillustrative only. Numerous alternative embodiments may be devised bythose skilled in the art without departing from the scope of thefollowing claims.

We claim:
 1. A one bit differential detector for a GMSK signal of theform x(t)=cos (ω_(IF) t+φ(t)) wherein ω_(IF) =2π(f_(IF) +Δf), f_(IF) isan intermediate frequency of x(t), Δf is a frequency offset of f_(IF),and φ(t) is a phase, said detector comprising:a first signal processingpath for outputting a signal y₁ =sin(2πΔf/f_(b) +Δφ(T)), where f_(b) isa baseband signal frequency and Δf is small compared to f_(b), and Δφ(T)is a change in phase of x(t) over a one symbol time period, and whichsignal y₂ is proportional to the sine of a change of phase of the signalx(t) over a one-symbol time interval plus a frequency offset term, asecond signal processing path for outputting signal y₂ =cos (2πΔf/f_(b)+Δφ(T)), which signal y₂ is proportional to the cosine of the change ofphase of the signal x(t) over a one symbol time interval plus afrequency offset term, and signal processing means connected to saidfirst and second signal processing paths and being connected to receivesaid signals y₁ and y₂ and configured to output an output signalu(t)=sin(Δφ(T)), which output signal is proportional to the sine of thechange of phase of the signal x(t) over one symbol time interval andindependent of said frequency offset, said signal processing meanscomprising:(a) means for generating a proportional to said frequencyoffset term of said signal y₁, wherein the signal proportional to saidfrequency offset term of said signal y₁ equals z(t) and z(t) beingapproximated as equal to (2πΔf/f_(b))cos (Δφ(T)) (b) means forsubtracting said proportional to said frequency offset from said signaly₁ to generate said output signal u(t).
 2. The detector of claim 1wherein said first signal processing path comprises,a one period delayunit for receiving said signal x(t), a 90° phase shifter connected tosaid one period delay unit having an output signal x₁ (t), a multiplierfor directly receiving said signal x(t) and for receiving said outputsignal x₁ (t) of said phase shifter wherein said multiplier has anoutput signal x(t)*x₁ (t)=sin (ω_(IF) T+Δφ(T)), and a low pass filterconnected to an output of said multiplier for receiving said outputsignal x(t)*x₁ (t) of said multiplier and for outputting said signal y₁.3. The detector of claim 1 wherein said second signal processing pathcomprises:a one period delay unit for receiving said signal x(t), amultiplier connected to receive said signal x(t) directly and to receivean out of the one period delay unit, and a low pass filter connected toan output of said multiplier for outputting said signal y₂.
 4. Thedetector of claim 1 further comprising a decision circuit for receivingsaid output signal u(t) from said signal processing means and forgenerating logic 1's and logic 0's in response thereto.
 5. The detectorof claim 1 wherein said means for generating said signal proportional tothe frequency offset term of the signal y₁ comprisesa filter forobtaining an expectation value of the signal y₁.
 6. The detector ofclaim 5, wherein said means for generating said signal proportional tothe frequency offset term of the signal y₁ further comprises:a firstmultiplier for multiplying the expectations value by a constant factor,and a second multiplier for multiplying the signal y₂, by an output ofthe first multiplier for generating said signal proportional to saidfrequency offset term.
 7. The detector of claim 1, wherein said signalprocessing means comprises:first and second filters for obtaining theexpectation values of E(y₁) and E(y₂) of said signals y₁ and y₂, a firstmultiplier for multiplying y₁ and E(y₂) a second multiplier formultiplying y₂ and E(y₁), and a subtractor for obtaining the differenceof an output from said first multiplier and the output from said secondmultiplier.
 8. A one bit differential detector for a GMSK signal of theform x(t)=cos(ω_(IF) t+φ(t)) where ω_(IF) -2π(f_(IF) +Δf), f_(IF) is afrequency, Δf is a frequency offset, and φ(t) is a phase, said detectorcomprising:a first signal processing path for outputting a signal y₁=sin(2πΔf/f_(b) +Δφ(T)), where f_(b) is a baseband signal frequency andwhich signal y₁ is proportional to the sine of the change of phase ofthe signal x(t) over a one-symbol time interval plus a frequency offsetterm, a second signal processing path for outputting a signal y₂ =cos(2πΔf/f_(b) +Δφ(T)), which signal y₂ is proportional to the cosine ofthe change of phase of the signal x(t) over a one symbol time intervalplus a frequency offset term, signal processing means connected to saidfirst and second signal processing paths for receiving said signals y₁and y₂ and outputting an output signal u(t)=sin(Δφ(T)), which outputsignal is proportional to the sine of the change of phase of the signalx(t) over one symbol time interval and independent of said frequencyoffset, wherein said offset frequency Δf is small compared to thebaseband signal frequency f_(b), and said signal processing meanscomprises means for generating a signal z(t) which is proportional tosaid frequency offset term of said signal y₁, and z(t) beingapproximated as equal to (2πΔf/f_(b))cos (Δφ(T)) and means forsubtracting said signal proportional to said frequency offset term fromsaid signal y₁ to generate said output signal u(t), wherein said meansfor generating comprises a filter for obtaining an expectation value ofthe signal y₂.
 9. A one bit differential detector for GMSK signal of theform x(t)=cos (ω_(IF) t+φ(t)) where ω_(IF) =2π(f_(IF) +Δf), f_(IF) is afrequency, Δf is a frequency offset, and φ(t) is a phase, said detectorcomprising:a first signal processing path for outputting a signal y₁=sin(2πΔf/f_(b) +Δφ(T)), where f_(b) is a baseband signal frequency andwhich signal y₁ is proportional to the sine of the change of phase ofthe signal x(t) over a one-symbol time interval plus a frequency offsetterm, a second signal processing path for outputting a signal y₂ =cos(2πΔf/f_(b) +Δφ(T)), which signal y₂ is proportional to the cosine ofthe change of phase of the signal x(t) over a one symbol time intervalplus a frequency offset term, signal processing means connected to saidfirst and second signal processing paths for receiving said signals y₁and y₂ and outputting an output signal u(t)=sin (Δφ(T)), which outputsignal is proportional to the sine of the change of phase of the signalx(t) over one symbol time interval and independent of said frequencyoffset, and wherein said signal processing means comprises first andsecond filters for obtaining the expectation values of E(y₁) and E(y₂)of said signals y₁ and y₂, a first multiplier for multiplying y₁ andE(y₂), a second multiplier for multiplying y₂ and E(y₁), and asubtractor for obtaining the difference of an output from said firstmultiplier and an output from said second multiplier.